1. Field of the Invention
This invention relates generally to the field of analog integrated circuit design and, more particularly, to the design of reference voltage control circuits.
2. Description of the Related Art
In the design of many integrated circuits, more specifically those using complementary metal-oxide-semiconductor (CMOS) technology, a specified and stable reference value, for example a reference voltage, may often be required to insure proper circuit operation. When designing analog circuits or circuit with analog components, a specified and stable reference voltage may be a necessity for the circuit to properly function in a substantially predictable manner. Examples of such circuits include devices that monitor temperature and voltage. Temperature monitoring devices are often included as part of digital systems, especially systems that include high-performance, high-speed circuits prone to operational variances due to temperature effects, in order to maintain the integrity of the system components.
Personal computers (PC), signal processors and high-speed graphics adapters, among others, typically benefit from temperature monitoring circuits. For example, a central processor unit (CPU) that typically “runs hot” as its operating temperature reaches high levels may require a temperature sensor in the PC to insure that it doesn't malfunction or break due to thermal problems. Typically, integrated circuit (IC) solutions designed to measure temperature in a system will monitor the voltage across one or more PN-junctions, for example a diode or multiple diodes at different current densities to extract a temperature value. This method generally involves sampling voltages generated on the diode(s), some analog processing of the sampled voltages, and
conversion by an analog-to-digital converter (ADC). ADCs generally require a precise voltage reference to function accurately and reliably.
Most of the time, reference values—voltage reference values in case of ADCs—need to be adjusted to account for possible process variations. When working within generally tight operational tolerances, a trim capability of the circuit may be required to make the necessary adjustments needed for achieving proper circuit operation over variations present in silicon processing. This trim capability for adjusting the reference voltage is commonly implemented by way of fuses that are usually cut or uncut, and/or by programming a one time programmable dedicated memory such as a ROM. Oftentimes the trimming process includes probing wafers during device characterization, determining the required trim, then cutting the fuses using laser trimming-devices or programming the dedicated ROM. The amount of trim may be determined based on a set of ‘trim bits’ indicating which fuses to cut and which fuses to leave uncut and/or which memory bits to set in the dedicated ROM.
When a device is being trimmed and/or adjusted, the test system controlling the trim operation typically has to set the device, make a measurement, make a decision based on the measurement, set the device based on the decision, and repeat the measurement. This measure-decide-set loop is typically repeated under control of the test system until the adjustment is completed. Such a process tends to consume a considerable amount of time due to the interaction of the device and test system, and the constant intervention required by the test system. In addition, any trimming algorithm built into the test software devised to perform such a process would have to track the settings that have been made, and determine what the next setting should be, in addition to keeping track of other possible parameters. This may place certain requirements on the capabilities of the tester that may not be available in some low cost test systems. It may also make it difficult, if at all possible, to considerably reduce testing costs, by preventing the system to make use of time- and cost-saving testing methods such as testing multiple devices in parallel during multi-site testing.
Other corresponding issues related to the prior art will become apparent to one skilled in the art after comparing such prior art with the present invention as described herein.